rtl-llm

AI & ML interests

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rtl-llm 's models 159

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-vhdl-gs16-batch16

Text Generation • 8B • Updated Jun 1, 2025 • 8 • 1

rtl-llm/qwen2.5coder-7b-origen-vhdl-vhdl-verilog-chisel-gs16

Text Generation • 8B • Updated May 31, 2025 • 4

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-vhdl-chisel-batch8

Text Generation • 8B • Updated May 31, 2025 • 3

rtl-llm/qwen2.5coder-7b-origen-vhdl-vhdl-verilog-gs16

Text Generation • 8B • Updated May 31, 2025 • 4

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-chisel

Text Generation • 8B • Updated May 31, 2025 • 4

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-vhdl-gs32

Text Generation • 8B • Updated May 31, 2025 • 3

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-gs16

Text Generation • 8B • Updated May 31, 2025 • 2

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-len768

Text Generation • 8B • Updated May 31, 2025 • 4

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-vhdl-gs16-fixed4o

Updated May 31, 2025

rtl-llm/qwen2.5coder-7b-origen-vhdl-vhdl-chisel-gs16

Text Generation • 8B • Updated May 31, 2025 • 4

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-chisel-interleaved-gs16

Text Generation • 8B • Updated May 31, 2025 • 5

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-chisel-truncate-gs8-2epochs

Text Generation • 8B • Updated May 31, 2025 • 5

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-vhdl-gs16-len768

Text Generation • 8B • Updated May 31, 2025 • 6

rtl-llm/test

Updated May 31, 2025

rtl-llm/qwen2.5coder-32b-origen-verilog-vhdl-chisel-truncate-len1024

Text Generation • 33B • Updated May 31, 2025 • 19 • 2

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-chisel-gs8

Text Generation • 8B • Updated May 31, 2025 • 5

rtl-llm/qwen2.5coder-32b-origen-vhdl-4.1-2epochs-gs16-len1024

Text Generation • 33B • Updated May 31, 2025 • 8 • 1

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-vhdl-gs16

Text Generation • 8B • Updated May 31, 2025 • 6

rtl-llm/qwen2.5coder-32b-origen-vhdl-vhdl-chisel-truncate

Text Generation • 33B • Updated May 31, 2025 • 4

rtl-llm/qwen2.5coder-32b-origen-vhdl-chisel-truncate-len1024-gs16

Text Generation • 33B • Updated May 30, 2025 • 4

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-truncate-interleave-lr2e-5

Text Generation • 8B • Updated May 30, 2025 • 4

rtl-llm/qwen2.5coder-32b-origen-verilog-truncate

Text Generation • 33B • Updated May 30, 2025 • 4

rtl-llm/qwen2.5coder-32b-origen-verilog-vhdl-chisel-truncate

Text Generation • 33B • Updated May 30, 2025 • 5

rtl-llm/qwen2.5coder-32b-origen-vhdl-4o-truncate

Text Generation • 33B • Updated May 30, 2025 • 5

rtl-llm/qwen2.5coder-32b-origen-vhdl-4.1-truncate

Text Generation • 33B • Updated May 30, 2025 • 3

rtl-llm/qwen2.5coder-7b-origen-verilog-truncate

Text Generation • 8B • Updated May 29, 2025 • 4

rtl-llm/qwen2.5coder-7b-origen-chisel-vhdl-verilog-truncate-interleave-len1024

Text Generation • 8B • Updated May 29, 2025 • 3

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-vhdl-truncate-interleave

Text Generation • 8B • Updated May 29, 2025 • 3

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-vhdl-truncate-interleave-len1024

Text Generation • 8B • Updated May 29, 2025 • 3

rtl-llm/qwen2.5coder-7b-origen-verilog-vhdl-chisel-truncate

Text Generation • 8B • Updated May 29, 2025 • 5