can you explain gm>>1/rds for MOS transistors?
398299
I believe you are referring to the transconductance of a MOS transistor.  gm >> 1/rds must mean that the transconductance must be much larger that 1.  "rds" must be the unit of transconductance (which is not typically shown) possibly radian*seconds.  This might be given to you so as to simplify a calculation.  For example is you have a term anywhere in your calculations that looks like this: (gm+1) you can change it to just: (gm).  This can often simplify complex algebra that may arise.
667524
All I know is that it's a TI chip based on TMS320 DSP platform. I found a good expression on the following site, but am not sure it's valid still.\n\nBetter to take a look at TI databooks.\nYours\nFredy
172228
10 pages for two points? Not me.  But, for two points, here's the first two sentences.  :)\n\nBiCMOS technology combines the high input impedence of the MOSFET with the fast switching speed of the bipolar junction transistor (BJT) allowing the fabrication of application-specific integrated circuits (ASICs) suitable for use in high-speed, portable, low-power devices.  The emergence of manufacturers dedicated to proto-type and small-batch wafer fabrication makes the development of highly-customized circuits increasingly feasible.
361052
64-bit memory chip\n\n=D
342505
I don't follow... AND gate means that ALL inputs must be HI to get a HI.  NAND inverts that, so...\n\nA (1)\nB (0).....0\nD (1)\n\nplus      ................... 1\n\nA (1)\nB (0).....0\nC (1)
398806
here is one of the datasheets available on the internet:\nhttp://www.ee.washington.edu/stores/DataSheets/74ls/74ls73.pdf
794683
please visit\n\nhttp://w3.id.tue.nl/fileadmin/id/objects/E-Atelier/doc/Datasheets/Transistoren/BS170.pdf\n\nfor the detailed report on bs170, N channel EMOSFET
167194
Look at each segment in the display and determine for which numbers it should be on (logic 1), and which it should be off (logic 0). \n\nMake a truth table for all 4 input lines for each segment.\n\nCreate an expression for each segment using you favourite technique, such as Karnaugh maps.\n\nChange the expression to only use nand gates.\n\nDo happy dance, cuz you're done.
129299
1GB single DIMM\n4 - 16 GB multiiple DIMMs
561571
An E1 signal is 2.048Mbps.  An STM-1 (Synchronous Transmission Module level 1) is an SDH (Synchronous Digital Hierarchy) signal which is 155.52 Mbps which is equivalent to an OC-3 (Optical Carrier level 3) signal, and has about the same bandwidth as 75 E1 signals or 100 T1 signals.
33167
A CMOS inverter consists of one N-channel transistor connected to ground, and one P channel transistor connected to Vdd. Their gate pins are tied together and used as the input, and their third pins are tied together and used as the output (See the picture below for details). These transistors act like switches, controlled by the input.\n\nWhen the input is high (Vdd), it turns on the N-channel transistor and turns off the P-channel transistor. This causes the voltage at the output to be low, because the N-channel transistor is switched on, connecting the output to the ground.\n\nWhen the input is low, just the opposite happens.
131607
Wow, I can't believe you have been waiting so long for an answer.\n\nThere are a couple of papers you can review:\n\ne.g. http://www.nsti.org/publ/MSM2002/348.pdf#search='frequency%20mosfet%20parameter'\n\nand here also:\nhttp://www.freewebs.com/anishamukherjee/Papers.htm\n\nThere is a tool here, but you need to pay, and I have not used it myself:\n\nhttp://www.highbeam.com/library/doc0.asp?docid=1G1:79591050&refid=ink_tptd_mag_test1&skeyword=&teaser=
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Vdd (Voltage Drain Drain)    - Positive\nVss (Voltage Source Source)  - Common, ground
617372
TTL is weird in some ways; its range for detecting 'high' and 'low' signals is significantly smaller than that of CMOS. (its low is the same low as CMOS, but its high is only half as high).\n\nSo, if you connected a TTL to a CMOS, it would not work, since the TTL would not be able to push a "high" signal through.\n\nOn the other hand, a CMOS -> TTL works well, since a CMOS high is way higher than a TTL high, and there is no such problem.\n\nThe issue with that is no one wants to go from CMOS -> TTL,  the only use of such a conversion would be TTL -> CMOS, if you were to upgrade old equipment for example. There exist special chips that bridge the gap, but I forget the name (sorry).
368276
Here, read all about it.\nhttp://inventors.about.com/library/weekly/aa080498.htm\nhttp://en.wikipedia.org/wiki/Integrated_circuit#History.2C_origins_and_generations
532709
the minimum current needed to cause the thyristor to latch/switch state
782316
The built-in potential is the delta in Fermi levels of the two sides of the junction\n\nFor silicon diodes, it's about 0.6 V