bus architecture, architectural diagram of cpu, pipeline support of the architecture, h/w to support memeory management, arithmatic instruction format
137715
Found a good diagram here\nhttp://www.laynetworks.com/Block%20diagram%20of%20the%20Pentium.htm
153027
This site should help\n\nhttp://www.technologystudent.com/struct1/model1.htm
225319
Start -> Programs -> Accessories -> System tools -> System Information. \n\nIt's all there.
298201
I am buying now a "custom built" one with these specs\n-LGA MB\n-3.0 GB dual\n-4 GB 600 bus ram\n-250 GB x 2 HDD\n-256 SVGA Express\n\nand it costs me 1800$
45823
It almost sounds as if your project is going to eventually become a "virtual machine", or better yet a simulated computer.\n\nThe first step is to determine your instruction set.  The computer will probably have the ability to perform simple arithmetic, such as add, subtract, multiply, divide, shift, jump to memory locations, etc.  Each of these operations will use a unique sequence of 'bits' to identify the specific operation.  For example, you can say that your machine only supports only sixteen instructions.  Because it is sixteen, we can identify each instructions with four bits:\n\nMOV   0000 - move data\nADD   0001 - add data\nSUB   0010 - subtract data\nMPY   0011 - multiply data\nDIV   0100 - divide data\nAND   0101 - bitwise 'and'\nOR    0110 - bitwise 'or'\nXOR   0111 - bitwise 'exclusive or'\nNOT   1000 - invert bits\nJMP   1001 - unconditional jump\nCMP   1010 - compare values\nJEQ   1011 - jump if equal\nJL    1100 - jump if less than\nJG    1101 - jump if greater than\nJLE   1110 - jump if less or equal\nJGE   1111 - jump if greater or equal\n\nOnce you determine the instructions the computer will support, you need to determine your addressing modes.  For example, an "add" instruction can work with two registers, two memory addresses, a memory address and a register, or indirect combinations of both.  For each addressing mode, we will assign a sequence of bits.  I'm going to choose only four addressing modes, "immediate" (where the data in the instruction is taken as a literal value), "memory" (where the data in the instruction is a memory address), "register" (where the data in the instruction is a register number) and "indirect" (where the value in a register is a memory address to where the data points).  I will use two bits to identify the source addressing mode, an another two bits to identify the destination addressing mode.  If the instruction only uses one destination, the second two bits would be used.  This is now a total of four bits which we combine with the first four bits of the opcode.  Below are the bits we will use for the modes:\n\nImmediate - 00\nRegister - 01\nMemory - 10\nIndirect Register - 11\n\nNow, we have defined a fairly competent instruction set that identifies the operations and addressing modes with only one byte of data!\n\nJust to show "mnemonics" of the assembly language of our computer, with addressing modes, consider the following:\n\nADD 10, R2 - Add number 10 to register 2 (immediate/register)\n\nADD R1, R2  - Add register 1 to register 2 (register/register)\n\nADD @MEM1, R2 - Add value in memory at MEM1 to register 2 (memory/register)\n\nADD *R1, R2 - Add value pointed to by address in register 1 to register 2 (indirect/register)\n\nNow, they would equate, in bits to the following:\nADD 10, R2      0001 00 01  (11 in hexadecimal)\nADD R1, R2      0001 01 01  (15 in hexadecimal)\nADD @MEM1, R2   0001 10 01  (19 in hexadecimal)\nADD *R1, R2     0001 11 01  (1D in hexadecimal)\n\nNote that each instruction and addressing mode is one byte, but only part of the complete instruction.  You can use the bitwise and (&) operator in C++ in order to mask off the opcode and addressing modes from that single byte (unsigned char).  So:\n\nopcode = byte & 0xF0;       (1111 0000)\nsourcemode = byte & 0xC0;   (0000 1100)\ndestmode = byte & 0x03;     (0000 0011)\n\nOnce we've determine the addressing mode for each one, the next sequence of bytes after the opcode and mode would be either the immediate value, a register value or a memory address.  The remainder of each instruction can be either a fixed or variable number of bytes, that is your choice.\n\nFrom there, you just process a stream of bytes and you can get the extract the operation, addressing mode, data for source and destination (or just destination if its a single operand).  Next, your "virtual machine" needs to sim
532237
No, no and no.  This is and energy saving feature, it's like a car, when you need the extra horsepower going uphill the powerband kicks in and you go faster.  The frequency at which a processor (CPU) operates is determined by applying a clock multiplier to the front side bus (FSB) speed. For example, a processor running at 550 MHz might be using a 100 MHz FSB. This means there is an internal clock multiplier setting (also called bus/core ratio) of 5.5; the CPU is set to run at 5.5 times frequency of the front side bus: 100 MHz x 5.5 = 550 MHz. By varying either the FSB or the multiplier, different CPU speeds can be achieved.
78641
This question can be meaningfully answered if you provide the mainframe make, name and model.
291607
please enter the link below;\nmsdn.microsoft.com/architecture/soa/
261414
Try the links below for specifics.  There are just too many different processors and their variants out there to give you a list here, but these links may help you find what you're looking for.
54604
You know this topic is too extensive to cover here. \n\nThere is some good reference material covering both types of processors here: http://ourworld.compuserve.com/homepages/r_harvey/doc_cpu.htm \n\nIn Pentium class processors, there also model-specific registers  http://ourworld.compuserve.com/homepages/r_harvey/doc_cpu.htm
47560
Defrag, virus & spyware scans, software installation, motherboard, memory, hard drive, DVD drive installation, power supply replacement, chip upgrade, memory upgrades, drive mirror & installation just to name a few
617102
1 Machine language\n2 Assembly language\n3 High level Language
259959
thats a very ambitious project! even for a simple CPU. I cant really help design one, but the manufacturers usually can sell you the rights to use one they have had done. they arent cheap, but if you use it in volume it "may" be worth it. if its just for a learning experience, "Good Luck"!
208049
like said above the CPU is the processor (central processing unit)\nthe chipset is responsible for the data transfer between all components. there are two components, the northbridge and the southbridge. the northbridge is responsible for the data transfer between CPU and RAM, CPU and Graphics Card, CPU and southbridge.\nthe southbridge is responsible for the data transfer from/to all ports (PCI, USB, Firewire, parallel, serial, PS/2 keyboard/mouse) to the hard disks and the sound controller.\nWhile Intel CPUs need dedicated northbridge and southbridge chips, AMD CPUs (Athlon) have an integrated northbridge.
510080
http://askcomputerexpert.ws43.com/internet/website.htm
39585
Memory Type\n DDR400/333 SDRAM\nMemory Description\n Three DDR 2.5V DIMM sockets support up to 3GB with 266 memory setting. PC3200/PC2700/PC2100/PC1600 non-ECC, unbuffered DDR SDRAM memory
233247
what is the FSB (front side bus) of ur processor if it is 800 or less 512 will be great and u don't have to upgrade trust me I assembled more than 100 new generation PC and the difference is not obvious and i don't think that one or tow seconds will affect !