Get the mnemonic for this instruction, or a default string if the
instruction is unrecognized.
967158
public String getMnemonic() {
        Opcode opcode = getOpcode();
        if (opcode == null)
            return "bytecode " + getUnsignedByte(0);
        else
            return opcode.toString().toLowerCase(Locale.US);
    }
1029075
def check_mnemonics cmenu, ch
#     $log.debug "inside check_mnemonics #{ch}"
      key = ch.chr.downcase rescue ""
      cmenu.items.each do |item|
        next if !item.respond_to? :mnemonic or item.mnemonic.nil?
#       $log.debug "inside check_mnemonics #{item.mnemonic}"
        if key == item.mnemonic.downcase && item.enabled # 2010-09-11 00:03 enabled
          ret = item.fire
          return ret #0 2009-01-23 00:45 
        end
      end
      return :UNHANDLED
    end
396475
def _getsie(self):
        
        try:
            value, newpos = self._readsie(0)
            if value is None or newpos != self.len:
                raise ReadError
        except ReadError:
            raise InterpretError("Bitstring is not a single interleaved exponential-Golomb code.")
        return value
67448
def parse_instruction(string, location, tokens):
    
    mnemonic_str = tokens.get("mnemonic")
    operands = [op for op in tokens.get("operands", [])]

    instr = ArmInstruction(
        string,
        mnemonic_str["ins"],
        operands,
        arch_info.architecture_mode
    )

    if "cc" in mnemonic_str:
        instr.condition_code = cc_mapper[mnemonic_str["cc"]]

    if "uf" in mnemonic_str:
        instr.update_flags = True

    if "ldm_stm_addr_mode" in mnemonic_str:
        instr.ldm_stm_addr_mode = ldm_stm_am_mapper[mnemonic_str["ldm_stm_addr_mode"]]

    return instr
76180
def ins(mnemonic):
    
    try:
        opcode = bytecode.opcode_table[mnemonic]
    except KeyError:
        click.secho(u'No definition found.', fg='red')
        return

    click.echo(u'{mnemonic} (0x{op})'.format(
        mnemonic=click.style(opcode['mnemonic'], fg='green', underline=True),
        op=click.style(format(opcode['op'], '02x'), fg='green')
    ))

    if opcode.get('desc'):
        click.secho('Description:', fg='yellow')
        click.echo(opcode['desc'])

    if opcode['can_be_wide']:
        click.echo(u'This instruction can be prefixed by the WIDE opcode.')

    if opcode.get('runtime'):
        click.secho('Possible runtime exceptions:', fg='yellow')
        for runtime_exception in opcode['runtime']:
            click.echo('- {runtime_exception}'.format(
                runtime_exception=click.style(runtime_exception, fg='red')
            ))

    if opcode['operands']:
        click.secho(u'Operand Format:', fg='yellow')
        for operand_fmt, operand_type in opcode['operands']:
            click.echo(u'- {ty} as a {fmt}'.format(
                ty=click.style(operand_type.name, fg='yellow'),
                fmt=click.style(operand_fmt.name, fg='yellow')
            ))
    elif opcode['op'] in (0xAB, 0xAA, 0xC4):
        # lookup[table|switch] and WIDE.
        click.secho(u'\nOperand Format:', fg='yellow')
        click.echo(
            u'This is a special-case opcode with variable operand parsing.'
        )
13441
public InstructionHandle getPredecessorOf(InstructionHandle handle) {
        if (VERIFY_INTEGRITY && !containsInstruction(handle)) {
            throw new IllegalStateException();
        }
        return handle == firstInstruction ? null : handle.getPrev();
    }
1223445
def find_best_instruction(addr, cpu_name, meta=None):
    
    addr = rv = parse_addr(addr)

    # In case we're not on the crashing frame we apply a simple heuristic:
    # since we're most likely dealing with return addresses we just assume
    # that the call is one instruction behind the current one.
    if not meta or meta.get('frame_number') != 0:
        rv = get_previous_instruction(addr, cpu_name)

    # In case registers are available we can check if the PC register
    # does not match the given address we have from the first frame.
    # If that is the case and we got one of a few signals taht are likely
    # it seems that going with one instruction back is actually the
    # correct thing to do.
    else:
        regs = meta.get('registers')
        ip = get_ip_register(regs, cpu_name)
        if ip is not None and ip != addr and \
           meta.get('signal') in (SIGILL, SIGBUS, SIGSEGV):
            rv = get_previous_instruction(addr, cpu_name)

    # Don't ask me why we do this, but apparently on arm we get better
    # hits if we look at the end of an instruction in the DWARF file than
    # the beginning.
    return round_to_instruction_end(rv, cpu_name)
205032
def default(self):
        
        if isinstance(self.__default, (str, unicode)):
            return self.valueFromString(self.__default)
        else:
            return self.__default
681991
def memorized_ttinfo(*args):
    ''''''
    try:
        return _ttinfo_cache[args]
    except KeyError:
        ttinfo = (
                memorized_timedelta(args[0]),
                memorized_timedelta(args[1]),
                args[2]
                )
        _ttinfo_cache[args] = ttinfo
        return ttinfo
317962
def expect(instr, expected, context):
    
    if not isinstance(instr, expected):
        raise DecompilationError(
            "Expected a {expected} instruction {context}. Got {instr}.".format(
                instr=instr, expected=expected, context=context,
            )
        )
    return instr
1006402
private MemoryMappedPE getMemoryMappedPE() {
        if (!memoryMapped.isPresent()) {
            memoryMapped = Optional.of(MemoryMappedPE.newInstance(data, this));
        }
        return memoryMapped.get();
    }
980663
def getunicode(self, name, default=None, encoding=None):
        '''  '''
        try:
            return self._fix(self[name], encoding)
        except (UnicodeError, KeyError):
            return default
1067768
def reg(self):
        """"""
        if self.type.is_displ or self.type.is_phrase:
            size = core.get_native_size()
            return base.get_register_name(self.reg_id, size)

        if self.type.is_reg:
            return base.get_register_name(self.reg_id, self.size)

        else:
            raise exceptions.SarkOperandWithoutReg("Operand does not have a register.")
582231
def get_scanner_param_default(self, param):
        
        assert isinstance(param, str)
        entry = self.scanner_params.get(param)
        if not entry:
            return None
        return entry.get('default')
1048689
public InstructionHandle getLabeledInstruction(String label) {
        PatternElementMatch first = getFirstLabeledMatch(label);
        return first != null ? first.getMatchedInstructionInstructionHandle() : null;
    }
401340
async def get_default(cls):
        """"""
        data = await cls._handler.read(id=cls._default_space_id)
        return cls(data)
774501
def to_string(mnemonic):
        
        strings = {
            # Arithmetic Instructions
            ReilMnemonic.ADD: "add",
            ReilMnemonic.SUB: "sub",
            ReilMnemonic.MUL: "mul",
            ReilMnemonic.DIV: "div",
            ReilMnemonic.MOD: "mod",
            ReilMnemonic.BSH: "bsh",

            # Bitwise Instructions
            ReilMnemonic.AND: "and",
            ReilMnemonic.OR:  "or",
            ReilMnemonic.XOR: "xor",

            # Data Transfer Instructions
            ReilMnemonic.LDM: "ldm",
            ReilMnemonic.STM: "stm",
            ReilMnemonic.STR: "str",

            # Conditional Instructions
            ReilMnemonic.BISZ: "bisz",
            ReilMnemonic.JCC:  "jcc",

            # Other Instructions
            ReilMnemonic.UNKN:  "unkn",
            ReilMnemonic.UNDEF: "undef",
            ReilMnemonic.NOP:   "nop",

            # Extensions
            ReilMnemonic.SEXT: "sext",
            ReilMnemonic.SDIV: "sdiv",
            ReilMnemonic.SMOD: "smod",
            ReilMnemonic.SMUL: "smul",
        }

        return strings[mnemonic]