asm : bitop expr COMMA A
            | bitop pexpr COMMA A
            | bitop expr COMMA reg8
            | bitop pexpr COMMA reg8
            | bitop expr COMMA reg8_hl
            | bitop pexpr COMMA reg8_hl
488812
def p_BIT(p):
    
    bit = p[2].eval()
    if bit < 0 or bit > 7:
        error(p.lineno(3), 'Invalid bit position %i. Must be in [0..7]' % bit)
        p[0] = None
        return

    p[0] = Asm(p.lineno(3), '%s %i,%s' % (p[1], bit, p[4]))
398711
def requires(self):
        
        if self.asm in arch.zx48k.backend.ASMS:
            return ALL_REGS

        if self.inst == '#pragma':
            tmp = self.__instr.split(' ')[1:]
            if tmp[0] != 'opt':
                return
            if tmp[1] == 'require':
                return set(flatten_list([single_registers(x.strip(', \t\r')) for x in tmp[2:]]))

            return set([])

        result = set([])
        i = self.inst
        o = [x.lower() for x in self.opers]

        if i in ['ret', 'pop', 'push']:
            result.add('sp')

        if self.condition_flag is not None or i in ['sbc', 'adc']:
            result.add('f')

        for O in o:
            if '(hl)' in O:
                result.add('h')
                result.add('l')

            if '(de)' in O:
                result.add('d')
                result.add('e')

            if '(bc)' in O:
                result.add('b')
                result.add('c')

            if '(sp)' in O:
                result.add('sp')

            if '(ix' in O:
                result.add('ixh')
                result.add('ixl')

            if '(iy' in O:
                result.add('iyh')
                result.add('iyl')

        if i in ['ccf']:
            result.add('f')

        elif i in {'rra', 'rla', 'rrca', 'rlca'}:
            result.add('a')
            result.add('f')

        elif i in ['xor', 'cp']:
            # XOR A, and CP A don't need the a register
            if o[0] != 'a':
                result.add('a')

                if o[0][0] != '(' and not is_number(o[0]):
                    result = result.union(single_registers(o))

        elif i in ['or', 'and']:
            # AND A, and OR A do need the a register
            result.add('a')

            if o[0][0] != '(' and not is_number(o[0]):
                result = result.union(single_registers(o))

        elif i in {'adc', 'sbc', 'add', 'sub'}:
            if len(o) == 1:
                if i not in ('sub', 'sbc') or o[0] != 'a':
                    # sbc a and sub a dont' need the a register
                    result.add('a')

                if o[0][0] != '(' and not is_number(o[0]):
                    result = result.union(single_registers(o))
            else:
                if o[0] != o[1] or i in ('add', 'adc'):
                    # sub HL, HL or sub X, X don't need the X register(s)
                    result = result.union(single_registers(o))

            if i in ['adc', 'sbc']:
                result.add('f')

        elif i in {'daa', 'rld', 'rrd', 'neg', 'cpl'}:
            result.add('a')

        elif i in {'rl', 'rr', 'rlc', 'rrc'}:
            result = result.union(single_registers(o) + ['f'])

        elif i in {'sla', 'sll', 'sra', 'srl', 'inc', 'dec'}:
            result = result.union(single_registers(o))

        elif i == 'djnz':
            result.add('b')

        elif i in {'ldir', 'lddr', 'ldi', 'ldd'}:
            result = result.union(['b', 'c', 'd', 'e', 'h', 'l'])

        elif i in {'cpi', 'cpd', 'cpir', 'cpdr'}:
            result = result.union(['a', 'b', 'c', 'h', 'l'])

        elif i == 'ld' and not is_number(o[1]):
            result = result.union(single_registers(o[1]))

        elif i == 'ex':
            if o[0] == 'de':
                result = result.union(['d', 'e', 'h', 'l'])
            elif o[1] == '(sp)':
                result = result.union(['h', 'l'])  # sp already included
            else:
                result = result.union(['a', 'f', "a'", "f'"])

        elif i == 'exx':
            result = result.union(['b', 'c', 'd', 'e', 'h', 'l'])

        elif i == 'push':
            result = result.union(single_registers(o))

        elif i in {'bit', 'set', 'res'}:
            result = result.union(single_registers(o[1]))

        elif i == 'out':
            result.add(o[1])
            if o[0] == '(c)':
                result.add('c')

        elif i == 'in':
            if o[1] == '(c)':
                result.add('c')

        elif i == 'im':
            result.add('i')

        result = list(result)
        return result
919717
def t_asm(t):
    '

    global ASM, ASMLINENO, IN_STATE
    t.lexer.begin('asm')

    ASM = ''
    ASMLINENO = t.lexer.lineno
    IN_STATE = True
63662
def coding_exons(self):
        
        # drop the trailing comma
        starts = (long(s) for s in self.exonStarts[:-1].split(","))
        ends = (long(s) for s in self.exonEnds[:-1].split(","))
        return [(s, e) for s, e in zip(starts, ends)
                                          if e > self.cdsStart and
                                             s < self.cdsEnd]
291424
def _addr(value):
    ''' 
    '''
    output = []

    try:
        indirect = False
        if value[0] == '*':
            indirect = True
            value = value[1:]

        value = int(value) & 0xFFFF
        if indirect:
            output.append('ld hl, (%s)' % str(value))
        else:
            output.append('ld hl, %s' % str(value))

    except ValueError:
        if value[0] == '_':
            output.append('ld hl, %s' % str(value))
            if indirect:
                output.append('ld c, (hl)')
                output.append('inc hl')
                output.append('ld h, (hl)')
                output.append('ld l, c')
        else:
            output.append('pop hl')
            if indirect:
                output.append('ld c, (hl)')
                output.append('inc hl')
                output.append('ld h, (hl)')
                output.append('ld l, c')

    output.append('call __ARRAY')
    REQUIRES.add('array.asm')

    return output
956898
function parse_PtgName(blob, length, opts) {
	var type = (blob.read_shift(1) >>> 5) & 0x03;
	var w = (!opts || (opts.biff >= 8)) ? 4 : 2;
	var nameindex = blob.read_shift(w);
	switch(opts.biff) {
		case 2: blob.l += 5; break;
		case 3: case 4: blob.l += 8; break;
		case 5: blob.l += 12; break;
	}
	return [type, 0, nameindex];
}
293856
def _and8(ins):
    
    op1, op2 = tuple(ins.quad[2:])
    if _int_ops(op1, op2) is not None:
        op1, op2 = _int_ops(op1, op2)

        output = _8bit_oper(op1)  # Pops the stack (if applicable)
        if op2 != 0:  # X and True = X
            output.append('push af')
            return output

        # False and X = False
        output.append('xor a')
        output.append('push af')
        return output

    output = _8bit_oper(op1, op2)
    # output.append('call __AND8')
    lbl = tmp_label()
    output.append('or a')
    output.append('jr z, %s' % lbl)
    output.append('ld a, h')
    output.append('%s:' % lbl)
    output.append('push af')
    # REQUIRES.add('and8.asm')

    return output
1102711
function parse_PtgAttrSemi(blob, length, opts) {
	var bitSemi = (blob[blob.l+1] & 0xFF) ? 1 : 0;
	blob.l += opts && opts.biff == 2 ? 3 : 4;
	return [bitSemi];
}
123312
def asm_instr(instr)
      command = extract_command(instr)
      param = extract_param(instr)

      # Branch instructions always in relative
      # mode. No other instructions use this mode.
      # Relative mode and zero-page mode look the
      # same to addr_mode(), so we need to handle
      # this here.
      if [:bpl, :bmi, :bvc, :bvs,
          :bcc, :bcs, :bne, :beq].
         include?(command)
        mode = :rel
      else
        mode = addr_mode(param)
      end

      bytes = []
      bytes << opcode(command, mode)

      # If implied mode, it's a 1-byte instruction.
      if [:imp].include?(mode)
        return bytes
      end

      # Handle label or address / immediate value
      if param =~ /\$/ # non-labels always have a $
        # Extract hex number from param string.
        number = /[0-9a-f]{1,4}/.match(param)[0].to_i(16)
      else
        # Store a dummy value and record this location
        # to be updated in 2nd pass.
        defer_value(@pc + 1, param)
        number = mode == :rel ? 0xff : 0xffff
      end

      # These instructions take 1 byte.
      if [:imm,  :zp,   :zpx,  :zpy,
          :indx, :indy, :rel].include?(mode)
        (number <= 0xff) || (raise "#{command}'s number too big")
        return bytes << number
      # These instructions take 2 bytes.
      elsif [:abs, :absx, :absy, :ind].include?(mode)
        (number <= 0xffff) || (raise 'number too big')
        bytes << (number & 0xff) # least-sig. byte
        bytes << (number >> 8)   # most-sig. byte
      end
    end
1097920
def encode_instruction(self, pc, instr):
        
        data = instr.split()
        operation = data[0]

        try:
            mips_op_info = MIPS.operations[operation]
        except KeyError, e:
            raise RuntimeError('Unknown operation: {}'.format(operation))

        # Grab the parsing info from the assembler operations table
        # Generate the initial operand map using the specified tokenizer
        parse_info = self.operations[operation]
        encoding_map = parse_info.tokenizer(parse_info.tokens, ''.join(data[1:]))

        # Get the binary equivalents of the operands and MIPS operation information
        self.resolve_operands(encoding_map, operation, pc)

        # Pull MIPS operation info into encoding map
        self.resolve_operation_info(encoding_map, mips_op_info)

        instruction = self.mips.generate_instruction(mips_op_info.format)
        return instruction.encode(encoding_map)
578410
def load_reg(self, reg_type, reg_name, name=''):
        
        ftype = types.FunctionType(reg_type, [])
        return self.asm(ftype, "", "={%s}" % reg_name, [], False, name)
930633
def assemble(io)
      arg = @left
      arg = arg.symbol if( arg.is_a? ::Risc::RegisterValue )
      is_reg = arg.is_a?(::Risc::RegisterValue)
      is_reg = (arg.to_s[0] == "r") if( arg.is_a?(Symbol) and not is_reg)

      raise "invalid operand argument #{arg.inspect} #{inspect}" unless (is_reg )
      operand = get_operand

      #not sure about these 2 constants. They produce the correct output for str r0 , r1
      # but i can't help thinking that that is because they are not used in that instruction and
      # so it doesn't matter. Will see
      if (operand.is_a?(Symbol) or operand.is_a?(::Risc::RegisterValue))
        val = reg_code(operand)
        i = 1  # not quite sure about this, but it gives the output of as. read read read.
      else
        i = 0 #I flag (third bit)
        val = operand
      end
      # testing against gnu as, setting the flag produces correct output
      # but gnu as produces same output for auto_inc or not, so that seems broken
      # luckily auto_inc is not used and even if it clobbers unused reg in soml, but still

      val = shift(val , 0 )
      val |= shift(reg_code(arg) ,  16)
      val |= shift(i ,              25)
      write_val(val, io)
    end
577632
def p_expr(self, p):
        
        if len(p) == 2:
            p[0] = p[1]
        else:
            p[0] = ast.Comma(left=p[1], right=p[3])
631299
def rem_or(self, start, end, instr, target=None, include_beyond_target=False):
        
        assert(start >= 0 and end <= len(self.code) and start <= end)

        # Find all offsets of requested instructions
        instr_offsets = self.inst_matches(start, end, instr, target,
                                          include_beyond_target)
        # Get all POP_JUMP_IF_TRUE (or) offsets
        if self.version == 3.0:
            jump_true_op = self.opc.JUMP_IF_TRUE
        else:
            jump_true_op = self.opc.POP_JUMP_IF_TRUE
        pjit_offsets = self.inst_matches(start, end, jump_true_op)
        filtered = []
        for pjit_offset in pjit_offsets:
            pjit_tgt = self.get_target(pjit_offset) - 3
            for instr_offset in instr_offsets:
                if instr_offset <= pjit_offset or instr_offset >= pjit_tgt:
                    filtered.append(instr_offset)
            instr_offsets = filtered
            filtered = []
        return instr_offsets
402075
def disco_loop_asm_format(opc, version, co, real_out,
                          fn_name_map, all_fns):
    

    if version < 3.0:
        co = code2compat(co)
    else:
        co = code3compat(co)

    co_name = co.co_name
    mapped_name = fn_name_map.get(co_name, co_name)

    new_consts = []
    for c in co.co_consts:
        if iscode(c):
            if version < 3.0:
                c_compat = code2compat(c)
            else:
                c_compat = code3compat(c)
            disco_loop_asm_format(opc, version, c_compat, real_out,
                                  fn_name_map, all_fns)

            m = re.match(".* object <(.+)> at", str(c))
            if m:
                basename = m.group(1)
                if basename != 'module':
                    mapped_name = code_uniquify(basename, c.co_code)
                    c_compat.co_name = mapped_name
            c_compat.freeze()
            new_consts.append(c_compat)
        else:
            new_consts.append(c)
        pass
    co.co_consts = new_consts

    m = re.match("^<(.+)>$", co.co_name)
    if m or co_name in all_fns:
        if co_name in all_fns:
            basename = co_name
        else:
            basename = m.group(1)
        if basename != 'module':
            mapped_name = code_uniquify(basename, co.co_code)
            co_name = mapped_name
            assert mapped_name not in fn_name_map
        fn_name_map[mapped_name] = basename
        co.co_name = mapped_name
        pass
    elif co_name in fn_name_map:
        # FIXME: better would be a hash of the co_code
        mapped_name = code_uniquify(co_name, co.co_code)
        fn_name_map[mapped_name] = co_name
        co.co_name = mapped_name
        pass

    co = co.freeze()
    all_fns.add(co_name)
    if co.co_name != '<module>' or co.co_filename:
        real_out.write("\n" + format_code_info(co, version, mapped_name) + "\n")

    bytecode = Bytecode(co, opc, dup_lines=True)
    real_out.write(bytecode.dis(asm_format=True) + "\n")
215756
def dump(self):
        
        org = min(self.memory_bytes.keys())  # Org is the lowest one
        OUTPUT = []
        align = []

        for i in range(org, max(self.memory_bytes.keys()) + 1):
            if gl.has_errors:
                return org, OUTPUT

            try:
                try:
                    a = [x for x in self.orgs[i] if isinstance(x, Asm)]  # search for asm instructions

                    if not a:
                        align.append(0)  # Fill with ZEROes not used memory regions
                        continue

                    OUTPUT += align
                    align = []
                    a = a[0]
                    if a.pending:
                        a.arg = a.argval()
                        a.pending = False
                        tmp = a.bytes()

                        for r in range(len(tmp)):
                            self.memory_bytes[i + r] = tmp[r]
                except KeyError:
                    pass

                OUTPUT.append(self.memory_bytes[i])

            except KeyError:
                OUTPUT.append(0)  # Fill with ZEROes not used memory regions

        return org, OUTPUT
1025394
def instruction_ASR_memory(self, opcode, ea, m):
        
        r = self.ASR(m)
#        log.debug("$%x ASR memory value $%x >> 1 | Carry = $%x and write it to $%x \t| %s" % (
#            self.program_counter,
#            m, r, ea,
#            self.cfg.mem_info.get_shortest(ea)
#        ))
        return ea, r & 0xff