Intel lauds milestone in shrinking chips
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Contradicting fears that the semiconductor industry&#39;s pace of development is slowing, Intel Corp announced it has achieved a milestone in shrinking the size of transistors that will power its next-generation chips.
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A small, fully functional, 70-megabit static random access memory computer chip crammed with more than 500,000,000 transistors has been developed by researchers at Intel Corp.
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One shiny 300mm disc looks much like another... IDF Intel has proclaimed its 32nm process "on track" for the delivery of processors fabbed using the process in late 2009. As proof, it showed off a 300mm wafer comprising 32nm memory cells - the world's first 32nm chips, it claimed.â¦
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pinkUZI writes &quot;Intel will announce that it has crammed 500 million transistors on to a single memory chip, shrinking them in size by 30%.
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(InfoWorld) - As Intel Corp. and Advanced Micro Devices Inc. (AMD) race toward smaller, faster chips, the fierce competition is taking its toll as both companies struggle to maintain profit margins by using more efficient manufacturing. At the tiny scale of 45-nanometer transistors and wires, a single speck of dust on a 300-millimeter silicon wafer can destroy an entire processor. Lower manufacturing yields cut into a company's profit margin, reducing the number of functional chips they can sell from each wafer. "As an industry, we're running out of gas at 45-nanometer geometry," said Nick Kepler, vice president of logic technology development for AMD. "We've been unable to scale the size as much as we used to because of leakage. We're still putting transistors closer together, but not shrinking the gates. So geometry shrinks can hurt you now, which they haven't in the past." One problem is that 65-nm and 45-nm chip components have shrunk so far that they are now smaller than the wavelength of the light used to carve those features onto silicon chips. To fight that trend,Â AMD and IBM Corp. said they will use three new technologies to boost manufacturing efficiency. By the second half of 2008, AMD expects to be producing 45-nm chips using immersion lithography, ultra-low-k interconnect dielectrics, and enhanced transistor strain. The companies made the announcement at the International Electron Device Meeting in San Francisco. By inserting liquid instead of air between the projection lens and the wafer, AMD and IBM can reduce the wavelength of the light, giving them a 40 percent gain in resolution compared to dry lithography and allowing them to sell a higher percentage of the hundreds of chips on every wafer, Kepler said. Likewise, IBM plans to produce 65-nm server chips by the second half of 2007, then shrink both server and gaming chips to 45-nm at some point in the future, said Gary Patton, vice president of technology development for IBM's semiconductor research and development center. AMD and IBM have cooperated on chip development since 2003, and last year extended their contract through 2011 to reach the 32-nm and 22-nm chip generations. In response, Intel says that it beat AMD to the market with 65-nm chip sales by more than a year, andÂ has already begun producing samples of its 45-nm "Penryn" quad-core chipÂ for notebooks, desktops and servers. Intel plans to ship those chips in the second half of 2007. Even if AMD improves its manufacturing, Intel is poised to continue its lead in shrinking chip geometries because it has shorter gate lengths and SRAM (static RAM) cell sizes, said Rob Willoner, a technology analyst with Intel's technology and manufacturing group. "People have different meanings when they talk about the 65-nm process. There's not an industry standard," he said. AMD's Opteron chip was a commercial success because its excellent design compensated for poor dimensions at the 90-nm scale, he said. Chips with a greater cache of local memory stored in SRAM cells can avoid the time-intensive process of retrieving data from external sources. At the same conference in San Francisco this week, Intel announced plans to use "floating-body cells" to further increase the amount of on-chip memory, according to published reports. Despite the manufacturing challenges, chip companies continue to build smaller features because of the tremendous performance benefits. By shrinking from 90 nm to 65 nm, Intel chips have double the transistor density while reducing leakage five-fold (at constant performance) and requiring 30 percent less switching power. Â
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A chip the size of a fingernail and capable of more than a trillion calculations per second is unveiled by Intel.
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Itanium&#39;s goals, which were lofty when the new architecture was first announced, have come down to reality. Instead of touting the 64-bit Itanium 2 as the sole architecture of the future, Intel
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Intel has shrunk a processor that will be incorporated into new ultrathin laptops, possibly creating competition for the chip in the MacBook Air laptop.
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Dual-core processors to be considered single chip, company says.
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Intel Corp , the world's  largest chipmaker, will be able to make microprocessors with  features as small as 32 nanometers within two years, its chief  executive said on Tuesday.
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A major milestone in microchip production is achieved allowing smaller and higher performance chips.
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For decades, computer performance has been driven largely by the increasing numbers of ever-smaller transistors squeezed into the machines&#39; silicon brains.
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Company alters traditional chip configuration to pack more memory into an even smaller unit.
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Intel has overhauled the basic building block of the information age, paving the way for faster and more energy-efficient processors.
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CONTRADICTING fears that the semiconductor industry&#39;s pace of development is slowing, Intel has achieved a milestone in shrinking the size of transistors that will power next-generation chips.
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Technical details of the new low-power mobile CPU, expected to ship this year, are being released at a chip conference this week.
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Catching up with rival Advanced Micro Devices Inc., Intel Corp. said Tuesday it will ship a desktop PC microprocessor that can handle significantly larger chunks of data than most of today's chips.