IBM, AMD Team On New Strained Silicon
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Advanced Micro Devices and IBM have collaborated on new strained silicon technology, which stands to boost transistor speed. In a statement ahead of the IEEE International Electron Devices Meeting in San Francisco
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(InfoWorld) - IBM will work with the German chemical company BASF Group to produce a new generation of chips with feature sizes of 32 nanometers, the companies said Friday. The partnership will produce chips scheduled to reach the market in 2010, IBM said. Chips with circuits and other features of 32nm use less electricity and have smaller dimensions than chips built with 45nm or 60nm, allowing vendors of smartphones, notebook PCs, and other electronics to pack more processing power in their products. The two companies hope to create an improved approach to using chemicals in lithography, a method of manufacturing chips by stacking layers of different materials like a cake, then etching away part of each layer to create the tiny components of a microprocessor. Work will begin immediately at IBM's facility in Yorktown Heights, New York, and at BASF's headquarters in Ludwigshafen, Germany, said Ronald Goldblatt, a distinguished engineer and senior manager at IBM Research. BASF already supplies chemicals to many chipmakers, but under the new partnership it will also share its employees and expertise with IBM. Each company will play to its strengths, with most of the synthesis and testing happening at BASF, while prototyping and application work at IBM, Goldblatt said. He declined to comment on whether the deal involved any exchange of money. IBM plans to use the new chemicals across its entire range of products, which include itsÂ Power6 high-end server chipÂ announced on May 21, a variety of ASICs for telephony backbone platforms, and itsÂ Cell Broadband Engine chipÂ used to process high-end graphics data in gaming consoles, including Sony Computer Entertainment's PlayStation 3, Microsoft's Xbox 360, and Nintendo's Wii. The BASF deal marks an expansion of IBM's strategy of collaborating with partners to design new chips instead of doing all the work itself. IBM used the same approach when it created the Cell chip by collaborating with Sony and Toshiba. And on May 23,Â IBM said it would collaborateÂ with a larger group of chipmakers on 32nm semiconductor production technologies. That group includes Chartered Semiconductor Manufacturing, Freescale Semiconductor, Infineon Technologies, and Samsung Electronics. IBM is also using the new deal to ratchet up competition with Intel, which plans to bring its own 32nm architecture chips to market by 2009. The two companies have been locked in an increasingly public race to design faster chips since they both picked the same day in January to issue news releases about advances in "high-k metal gate" technology. That approach employs rare materials to construct smaller, more efficient transistors than the silicon dioxide used in modern chips. Intel insists it leads the industry in that race, with plans to use the new technique to launch its 45nm "Penryn" chip in the fourth quarter of 2007, while IBM and its partner Advanced Micro Devices don't plan to sell 45nm chips until the middle of 2008. Texas Instruments entered the contest as well on June 13, announcing a plan to use high-k materials in 45nm chips, also beginning production in the middle of 2008.
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Intel will try to further cut power consumption in its next generation of chips by using improved strained silicon, along with transistors that block power to other circuits, and other added features.
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Your processor can now run 24% faster at the same power levels based on the new strained silicon transistor technology, as claimed by IBM and AMD today.
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IBM (Quote, Chart) is looking to get a leg up on the competition with the October 15 launch of eServer 326, a rack-mounted server that supports AMD&#39;s (Quote, Chart) upcoming dual-core 64-bit processor.
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Advanced Micro Devices Inc. (AMD) may yet team up with another chip maker for the construction of a semiconductor fabrication plant (fab) to expand its manufacturing capacity for microprocessors, despite shelving similar plans in 2003, according to a senior company executive.
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IBM and Advanced Micro Devices have tacked a three-year extension onto their December 2002 collaboration agreement that could see the two companies work on chip-making technologies based on a 32-nanometer process.
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IBM and AMD have jointly developed a new method for implementing strained silicon technology on both positive and negative transistors, a technique they said could improve transistor speeds by as much as 24%.
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Intel Corp. will shift to a second-generation strained-silicon technique within its forthcoming 65-nanometer process technology, the company will announce on Monday.
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DECEMBER 13, 2004 (IDG NEWS SERVICE) - IBM and Advanced Micro Devices Inc. announced today that they have jointly developed a new method for implementing strained silicon technology on both positive and negative transistors.
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Advanced Micro Devices (AMD) is expected to migrate all of its CPU production to 90nm silicon-on-insulator (SOI) processes in early 2005, according to sources at Taiwan motherboard makers, citing AMDâs latest roadmap.
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A new faster version &#39;strained silicon&#39; has been developed by IBM and AMD. The companies are claiming that the resulting transistors are up to 24 per cent faster than existing processes.
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(InfoWorld) - As Intel Corp. and Advanced Micro Devices Inc. (AMD) race toward smaller, faster chips, the fierce competition is taking its toll as both companies struggle to maintain profit margins by using more efficient manufacturing. At the tiny scale of 45-nanometer transistors and wires, a single speck of dust on a 300-millimeter silicon wafer can destroy an entire processor. Lower manufacturing yields cut into a company's profit margin, reducing the number of functional chips they can sell from each wafer. "As an industry, we're running out of gas at 45-nanometer geometry," said Nick Kepler, vice president of logic technology development for AMD. "We've been unable to scale the size as much as we used to because of leakage. We're still putting transistors closer together, but not shrinking the gates. So geometry shrinks can hurt you now, which they haven't in the past." One problem is that 65-nm and 45-nm chip components have shrunk so far that they are now smaller than the wavelength of the light used to carve those features onto silicon chips. To fight that trend,Â AMD and IBM Corp. said they will use three new technologies to boost manufacturing efficiency. By the second half of 2008, AMD expects to be producing 45-nm chips using immersion lithography, ultra-low-k interconnect dielectrics, and enhanced transistor strain. The companies made the announcement at the International Electron Device Meeting in San Francisco. By inserting liquid instead of air between the projection lens and the wafer, AMD and IBM can reduce the wavelength of the light, giving them a 40 percent gain in resolution compared to dry lithography and allowing them to sell a higher percentage of the hundreds of chips on every wafer, Kepler said. Likewise, IBM plans to produce 65-nm server chips by the second half of 2007, then shrink both server and gaming chips to 45-nm at some point in the future, said Gary Patton, vice president of technology development for IBM's semiconductor research and development center. AMD and IBM have cooperated on chip development since 2003, and last year extended their contract through 2011 to reach the 32-nm and 22-nm chip generations. In response, Intel says that it beat AMD to the market with 65-nm chip sales by more than a year, andÂ has already begun producing samples of its 45-nm "Penryn" quad-core chipÂ for notebooks, desktops and servers. Intel plans to ship those chips in the second half of 2007. Even if AMD improves its manufacturing, Intel is poised to continue its lead in shrinking chip geometries because it has shorter gate lengths and SRAM (static RAM) cell sizes, said Rob Willoner, a technology analyst with Intel's technology and manufacturing group. "People have different meanings when they talk about the 65-nm process. There's not an industry standard," he said. AMD's Opteron chip was a commercial success because its excellent design compensated for poor dimensions at the 90-nm scale, he said. Chips with a greater cache of local memory stored in SRAM cells can avoid the time-intensive process of retrieving data from external sources. At the same conference in San Francisco this week, Intel announced plans to use "floating-body cells" to further increase the amount of on-chip memory, according to published reports. Despite the manufacturing challenges, chip companies continue to build smaller features because of the tremendous performance benefits. By shrinking from 90 nm to 65 nm, Intel chips have double the transistor density while reducing leakage five-fold (at constant performance) and requiring 30 percent less switching power. Â
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Opteron and Cell fuel 'Roadrunner' Los Alamos National Laboratory (LANL) will turn to both AMD's Opteron chip and IBM's Cell in an effort to breath new life into its supercomputing program.â¦
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IBM (Quote, Chart) and AMD (Quote, Chart) have devised a new silicon transistor technology they claim will boost the speeds of single- and dual-core chips.
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Microprocessor maker AMD and IBM have developed a strained silicon transistor technology aimed at improving processor performance and power efficiency.
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In an advance that could lead to lighter spacecraft and smarter cars, researchers have developed a new technique for producing a high-quality computer chip that is much more resistant to extreme conditions than the silicon found in most of today&#39;s