Intel to throttle power by enhancing silicon
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Intel will try to further cut power consumption in its next generation of chips by using improved strained silicon, along with transistors that block power to other circuits, and other added features.
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Researchers at IBM and AMD have improved a chip-making technology called strained silicon. Their announcement, of a new and unique strained silicon transistor technology, is aimed at improving processor performance and power efficiency.
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(InfoWorld) - Intel said Tuesday it will ramp up performance and energy efficiency in its microprocessors by using a 32-nanometer process technology starting in 2009. During a keynote at the Intel Developer Forum in San Francisco, Intel president and CEO Paul Otellini showed a 300mm wafer built using the 32-nm manufacturing technology. The chip will house more than 1.9 billion transistors and its increased performance will enable "true to life entertainment and real-life graphics capabilities," Otellini said in his keynote. The chips will be an upgrade over processors built using the 45-nm process Intel is incorporating in its Penryn processor, due in November, and Silverthorne and Nehalem processors, slated to appear early and in the second half of next year, respectively. Intel currently uses a 65-nm process to manufacture chips, and Penryn is the code name given to the 45-nm "shrink" of Intel's current chip designs. The measurements refer to the size of the features on the silicon chip. In the first public demonstration of the Nehalem processor, Otellini said it will deliver better performance per watt and better system performance through its QuickPath Interconnect system architecture, which will include an integrated memory controller and improved communication links between system components. Otellini also announced a Penryn dual-core processor operating at 25 watts that will be available on the upcoming Montevina platform, which will also include WiMax technology. To meet multiple computing needs, Otellini said Intel also plans to introduce 15 new 45-nm processors by the end of the year and 20 in the first quarter of 2008. Intel isn't the first to announce 32-nm chip technology. In May, a group of chipmakers led by IBM agreed to further collaborate to jointly develop 32-nm semiconductor production technology. Other companies in the collaboration include Freescale Semiconductor, Chartered Semiconductor Manufacturing, Infineon Technologies, and Samsung Electronics. There was nothing surprising in Otellini's keynote, said Doug Freedman, an analyst at American Technology Research. Intel's road map tends to be conservative, and the company is well on track to meeting its time line, he said. With the new chips, users will continue to get more processing performance at a similar price point, he said.
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Your processor can now run 24% faster at the same power levels based on the new strained silicon transistor technology, as claimed by IBM and AMD today.
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Sun stroked Proving that it no longer aspires to making chips hotter than the surface of the sun, Intel has pushed out new, low-voltage versions of its best Xeon chip.â¦
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Intel is drawing the curtain on some of its future research projects to continue making transistors smaller, faster, and less power-hungry out as far as 2020.
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Intel Corp. is planning to introduce a faster front-side bus on an upcoming version of its Pentium 4 Extreme Edition processor that will help the firm increase the performance of its chips by improving a crucial bottleneck in system performance.
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Intel drew the curtain Friday on some of its future research projects to continue making transistors smaller, faster, and less power-hungry out as far as 2020.
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(InfoWorld) - AMD on Monday is giving the public an advanced look at how its pending quad-core chip will improve performance and save energy. AMD, playing catch-up to rival Intel, whoseÂ quad-core XeonÂ product launched in 2006, will discuss features of its quad-core product, code-named Barcelona, at the International Solid States Circuits Conference in San Francisco, a forum for engineers in solid state circuitry and system-on-a-chip processor design. AMD says it will present details at the conference of how Barcelona, due to be released in mid-2007, improves performance and energy efficiency over the competition and over its own dual-core processor, the Opteron, which it introduced in 2003. Barcelona will feature "Enhanced PowerNow" technology, which will dynamically adjust core frequencies as workloads change in order to power down cores when not needed to save energy, said Brent Kerby, product marketing manager for Opteron. Under the PowerNow technology already deployed in the dual-core Opteron, the OS delivers the needed power to the busiest core, but if the other core is not as busy, it will still receive the voltage demanded of the busiest core, Kerby said. But with Enhanced PowerNow, while the busiest core will receive the power it needs, the OS will reduce the frequency and voltage of the remaining cores because they aren't as busy. "We still see power savings with our current PowerNow technology, but it's going to get better with Barcelona because we're going to be able to dynamically and independently adjust the core frequencies of each individual core," he said. Also in Barcelona, the OS will directly communicate with the CPU instead of first going through the CPU driver, a more efficient approach, he said. "With Barcelona, there is no CPU driver middleman. The OS can tell the processor directly, 'Hey this is how much work I'm doing,' and the Barcelona core will determine when the best time is to make that change. It's not doing it blindly," he said. Barcelona also separates the power management of the cores from that of the memory controller, which is embedded in AMD-designed processors. That way, frequency and voltage can be reduced to the cores when they are not busy and increased to the memory controller when it is busy, and vice versa. AMD claims an 80 percent reduction in memory controller power usage with this design change. Barcelona will also feature enhanced clock-gating, which means core logic circuits can be turned on or off to save power. Like settings on a coffee grinder, the chip can do "coarse" or "fine" clock gating, shutting down increasingly finer sections of core logic as needed. AMD claims that Barcelona can deliver a 40 percent improvement in performance over "the competition." While not mentioning Intel's Xeon specifically, AMD has long pointed out that its quad-core chip will be four cores designed on the same piece of silicon, while Intel's design is two dual-core processors packaged together.
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Contradicting fears that the semiconductor industry&#39;s pace of development is slowing, Intel Corp has announced that it has achieved a milestone in shrinking the size of transistors that will power its next-generation chips.
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Chip-making technique to fuel AMD64, PowerPC, 'Cell' production
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AMD&#39;s Opteron processors will soon be able to take advantage of the same powermanagement technology the company has already built into its desktop and laptop processors.
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This week's Intel Developer Forum should reveal more about quad-core processor designs and plans for mobile and server chips.
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Power consumption continues to climb, so Intel will reach into the bag of tricks to keep Moore's Law going.
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Chip power has increased dramatically in the last few years, thanks to new multicore processors from Intel, AMD and other chip makers. The problem is, software developers who understand how to utilize the new hardware are in short supply.
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CONTRADICTING fears that the semiconductor industry&#39;s pace of development is slowing, Intel has achieved a milestone in shrinking the size of transistors that will power next-generation chips.
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Company will break its promise to deliver a speedier chip, shifts focus to dual-core designs. Intel has confirmed its near-term plans for its desktop processors before it reaches the multicore era.