Keyword for MPUs in 2005: Dual Core
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, 12/27/2004. The glamour and high growth that once surrounded the computer market may be long gone. The groundbreaking Apple computer television commercial broadcast during the Superbowl
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Advanced Micro Devices is making a push to beat Intel in the development of dual core microprocessors based on x86 chips.  On Tuesday, AMD (NYSE: AMD) unveiled a prototype dual-core Opteron processor running in a Hewlett-Packard ProLiant server.
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Microsoft Corp., world&#39;s largest software maker, announced a new licensing policy for dual-core microprocessors from Intel and AMD.
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End of the road for single-core CPUs? Intel's Celeron line of budget processors will go dual-core in the new year, a prelude to a plan that will see the chip giant phase out single-core products, it has been claimed.â¦
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Microsoft software that is currently licensed on a per-processor model will continue to be licensed per processor, not per core, for hardware that contains dual-core and multi-core processors.
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Athlon 64 X2 line extended AMD this morning rolled out its 65nm Athlon 64 X2 dual-core processors, as expected. The chips are pitched as "energy efficient" products, and come in at the same price as their 90nm equivalents.â¦
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When Fully buffered DIMMs attack A recent benchmark comparing quad-core chips asserts that Intel Xeon-based servers have an edge in performance but are complete power hogs when compared to the dainty energy appetite of AMD Opteron-based servers.â¦
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TechWeb - The software supports a number of hardware platforms based on the ARM7 and ARM9 processor cores.
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Dell Precision M4300, aimed at design professionals, runs on Intel Core 2 Duo dual-core CPU.
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T5200 to tackled entry-level Turion X2s? Intel will ship its anticipated low-end mobile Core 2 Duo T5200 dual-core processor next month, it has been claimed by Taiwanese notebook manufacturer moles. The part has not, apparently, been listed on recent Intel mobile roadmaps.â¦
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(InfoWorld) - AMD on Monday is giving the public an advanced look at how its pending quad-core chip will improve performance and save energy. AMD, playing catch-up to rival Intel, whoseÂ quad-core XeonÂ product launched in 2006, will discuss features of its quad-core product, code-named Barcelona, at the International Solid States Circuits Conference in San Francisco, a forum for engineers in solid state circuitry and system-on-a-chip processor design. AMD says it will present details at the conference of how Barcelona, due to be released in mid-2007, improves performance and energy efficiency over the competition and over its own dual-core processor, the Opteron, which it introduced in 2003. Barcelona will feature "Enhanced PowerNow" technology, which will dynamically adjust core frequencies as workloads change in order to power down cores when not needed to save energy, said Brent Kerby, product marketing manager for Opteron. Under the PowerNow technology already deployed in the dual-core Opteron, the OS delivers the needed power to the busiest core, but if the other core is not as busy, it will still receive the voltage demanded of the busiest core, Kerby said. But with Enhanced PowerNow, while the busiest core will receive the power it needs, the OS will reduce the frequency and voltage of the remaining cores because they aren't as busy. "We still see power savings with our current PowerNow technology, but it's going to get better with Barcelona because we're going to be able to dynamically and independently adjust the core frequencies of each individual core," he said. Also in Barcelona, the OS will directly communicate with the CPU instead of first going through the CPU driver, a more efficient approach, he said. "With Barcelona, there is no CPU driver middleman. The OS can tell the processor directly, 'Hey this is how much work I'm doing,' and the Barcelona core will determine when the best time is to make that change. It's not doing it blindly," he said. Barcelona also separates the power management of the cores from that of the memory controller, which is embedded in AMD-designed processors. That way, frequency and voltage can be reduced to the cores when they are not busy and increased to the memory controller when it is busy, and vice versa. AMD claims an 80 percent reduction in memory controller power usage with this design change. Barcelona will also feature enhanced clock-gating, which means core logic circuits can be turned on or off to save power. Like settings on a coffee grinder, the chip can do "coarse" or "fine" clock gating, shutting down increasingly finer sections of core logic as needed. AMD claims that Barcelona can deliver a 40 percent improvement in performance over "the competition." While not mentioning Intel's Xeon specifically, AMD has long pointed out that its quad-core chip will be four cores designed on the same piece of silicon, while Intel's design is two dual-core processors packaged together.
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Looking to get the most out of multi-core processors, a European-driven effort to build a framework for Java-based, real-time applications on modern multi-core chips and parallel processor systems is being announced Tuesday.Called the Java Environment for Parallel Real-time Development, or JEOPARD, the project is being underwritten by the European Commission (EC) to the tune of more than $4.9 million (3.3 million Euros), said The Open Group, which is participating in the project.The objective is to provide tools for platform-independent development of predictable systems that make use of symmetric multiprocessing multi-core platforms and field programmable gate array components, Open Group said. Tools plan would enhance software productivity and reusability by extending processor technology established on desktop systems for the needs of multi-core embedded systems."If you go out and buy a laptop or server, you get four-core processors or whatever. The way people program both applications and OSes hasn't really taken full advantage of the capabilities of these multi-core processors," said Dave Lounsbury, vice president for government services at The Open Group. "This is a hot topic. I think everybody recognizes there are some limitations right now," in making use of multi-core systems, he said.JEOPARD will research how to build APIs, OS extensions and language support for multi-core processors, with a special emphasis on embedded systems, Lounsbury said.The project will delve into extensions to handle different memory configurations. Situations will be considered in which there is not full symmetry, such as when a processor cannot access all parts of memory or chips are not using the same clock, said Lounsbury. These considerations are important because of constraints in memory bandwidth. Languages and operating systems can perform optimizations to address this."The idea here is that we'll see the creation of new sets of tools, whether it's extensions to OSes or new sets of compilers or languages like Java that will bring some of these new capabilities," Lounsbury said.While the project is based around Java, concepts from it could be made to work in other environments, he said. Asked when there might be results from JEOPARD, Lounsbury said the effort is a three-year EC program.Chip vendors could be expected to look closely at the project and incorporate results into their next generations of chips.Contributions from JEOPARD will be to be made to the RTSJ (Real-Time Specification for Java), which focuses on development of portable software in the multi-core embedded space, The Open Group said. Also, JEOPARD will feature development of a platform-independent software development interface for real-time multi-core systems based on RTSJ and Safety-Critical Java. RTSJ is the subject of Java Specification Requests 1 and 282 in the Java Community Process, while Safety-Critical Java is covered in JSR 302.Also participating in JEOPARD are the University of York, FZI, Vienna University of Technology, and the Technical University of Cluj-Napoca. Other participants include industrial manufacturers EADS, RadioLabs, and SkySoft and two embedded systems technology suppliers, aicas and Sysgo.In another effort pertaining to development for multi-core chips, RapidMind in November announced RapidMind Multi-core Development Platform v.30, which seeks to help developers build for these processors.
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Microsoft gave some encouraging news for IT managers considering future server hardware based on multicore processors. Both Intel and AMD are developing multicore chips, which pack two processors onto a single
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SAN FRANCISCO - Intel Corp.'s dual-core strategy for mobile processors became a little clearer this week at the Intel Developer Forum in San Francisco, but questions remain about the company's plans for bringing dual-core designs to its desktop and low-end server chips.
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SAN FRANCISCO - In a move that could upstage the dual-core processor plans of Advanced Micro Devices Inc. (AMD) and Intel Corp., Via Technologies Inc. is developing a twin-core x86 processor that is likely to hit the market by June 2005, a company executive confirmed Tuesday.
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Intel is on track to introduce work-sharing dual-core processors across all its product lines by the end of next year. The technology is part of a strategy shift at Intel away from processor speed and toward performance.
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Since AMD furthered its industry leadership in multi-core computing by demonstrating the industry&#39;s first x86 dual-core processor in August, AMD has strongly advocated this customer-centric software licensing strategy for both server and client software.