EBI_DEV4_TIM1_WR1_OFFS)
#define EBI_DEV4_TIM1_WR2_OFFS		0x00000430
#define EBI_DEV4_TIM1_WR2(base)		((base) + EBI_DEV4_TIM1_WR2_OFFS)
#define EBI_DEV4_TIM_EXT_OFFS		0x00000434
#define EBI_DEV4_TIM_EXT(base)		((base) + EBI_DEV4_TIM_EXT_OFFS)
#define EBI_DEV4_TIM2_CFI_RD1_OFFS	0x00000438
#define EBI_DEV4_TIM2_CFI_RD1(base)	((base) + EBI_DEV4_TIM2_CFI_RD1_OFFS)
#define EBI_DEV4_TIM2_CFI_RD2_OFFS	0x0000043C
#define EBI_DEV4_TIM2_CFI_RD2(base)	((base) + EBI_DEV4_TIM2_CFI_RD2_OFFS)
#define EBI_DEV4_TIM3_DMA1_OFFS		0x00000440
#define EBI_DEV4_TIM3_DMA1(base)	((base) + EBI_DEV4_TIM3_DMA1_OFFS)
#define EBI_DEV4_TIM3_DMA2_OFFS		0x00000444
#define EBI_DEV4_TIM3_DMA2(base)	((base) + EBI_DEV4_TIM3_DMA2_OFFS)
#define EBI_DEV4_TIM4_UDMA1_OFFS	0x00000448
#define EBI_DEV4_TIM4_UDMA1(base)	((base) + EBI_DEV4_TIM4_UDMA1_OFFS)
#define EBI_DEV4_TIM4_UDMA2_OFFS	0x0000044C
#define EBI_DEV4_TIM4_UDMA2(base)	((base) + EBI_DEV4_TIM4_UDMA2_OFFS)
#define EBI_DEV4_ACK_RM_CNT_OFFS	0x00000450
#define EBI_DEV4_ACK_RM_CNT(base)	((base) + EBI_DEV4_ACK_RM_CNT_OFFS)
#define EBI_INTERLEAVE_CNT_OFFS		0x00000900
#define EBI_INTERLEAVE_CNT(base)	((base) + EBI_INTERLEAVE_CNT_OFFS)
#define EBI_CNT_FL_PROGR_OFFS		0x00000904
#define EBI_CNT_FL_PROGR(base)		((base) + EBI_CNT_FL_PROGR_OFFS)
#define EBI_CNT_EXT_PAGE_SZ_OFFS	0x0000090C
#define EBI_CNT_EXT_PAGE_SZ(base)	((base) + EBI_CNT_EXT_PAGE_SZ_OFFS)
#define EBI_CNT_WAIT_RDY_OFFS		0x00000914
#define EBI_CNT_WAIT_RDY(base)		((base) + EBI_CNT_WAIT_RDY_OFFS)
#define EBI_CNT_ACK_OFFS		0x00000918
#define EBI_CNT_ACK(base)		((base) + EBI_CNT_ACK_OFFS)
#define EBI_GENIO1_CONFIG1_OFFS		0x00000A00
#define EBI_GENIO1_CONFIG1(base)	((base) + EBI_GENIO1_CONFIG1_OFFS)
#define EBI_GENIO1_CONFIG2_OFFS		0x00000A04
#define EBI_GENIO1_CONFIG2(base)	((base) + EBI_GENIO1_CONFIG2_OFFS)
#define EBI_GENIO1_CONFIG3_OFFS		0x00000A08
#define EBI_GENIO1_CONFIG3(base)	((base) + EBI_GENIO1_CONFIG3_OFFS)
#define EBI_GENIO2_CONFIG1_OFFS		0x00000A10
#define EBI_GENIO2_CONFIG1(base)	((base) + EBI_GENIO2_CONFIG1_OFFS)
#define EBI_GENIO2_CO